Manufacturer	ID	location	Date	from
Thinking Machines Corporation	CM-1	**	1985	Dow Jones & Company
Thinking Machines Corporation	CM-2	**	1987	MIT Laboratory for Computer Science
Thinking Machines Corporation	CM-5	**	1993	MIT Laboratory for Computer Science

Photo of Connection-5 50 K Bytes

from http://www.nas.nasa.gov/Pubs/TechReports/RNRreports/hsimon/RNR-92-016/subsection3_2_12.html#SECTION00021200000000000000

Thinking Machines Corporation (TMC) has been very successful with their CM-2 [Sim89][SVD92][Schr90] with about 35 machines installed.

Architecture

12 dimension hypercube Architecture from http://mission.base.com/tamiko/theory/cm_txts/di-frames.html For Danny Hillis, a student working on problems in human cognition at the Massachusetts Institute of Technology's Artificial Intelligence Laboratory in the late '70s, existing sequential supercomputers were simply inadequate for the problems that interested him. Even the fastest supercomputers were unable to recognize human faces, use language at the level of a 5-year-old child, or perform other tasks that humans, equipped with brains much slower than any supercomputer, could solve with ease. He became convinced that it was necessary to design a parallel computer with a structure closer to that of a human brain. In order to build the first of these new machines, Hillis helped found Thinking Machines Corporation in 1983, which introduced the CM-1 in 1986 and the higher performance version, the CM-2, in 1987. (Since the CM-2 quickly replaced the CM-1, being a faster version of the same computer architecture, as well as using the same external package, I will speak only of the CM-2 from now on.) These machines had 65,536 simple 1-bit processors that could simultaneously perform the same calculation, each on its own separate data set. For problems involving the separate but interrelated actions of many similar objects or units, such as movement of atoms, fluid flow, information retrieval, or computer graphics, this "data-parallel" structure brought tremendous increases in speed while also being easy to program. Many problems that seemed impossibly complex when analyzed with sequential logic fit naturally into a parallel data structure. (3) This type of massively parallel architecture had been tried before, but what enabled the CM-2 to succeed where other designs had failed was an extremely flexible and fast communications network between the processors. Using the model of the human brain, Hillis's design placed importance not so much on the processors themselves, but rather on the nature and mutability of the connections between them, hence the name "Connection Machine." http://www.gigaflop.demon.co.uk/comp/chapt7.htm#7.4 many identical interconnected processors under the supervision of a single control unit, see figure 7.1.2. The control unit transmits the same instruction, simultaneously, to all processors. All the processing elements simultaneously execute the same instruction and are said to be 'lock-stepped' together. Each processor works on data from its own memory and hence on distinct data streams. (Some systems also provide a shared global memory for communications.) Every processor must be allowed to complete its instruction before the next instruction is taken for execution. Thus, the execution of instructions is said to be synchronous. This category corresponds to the array processors discussed in section 2.3.3 and examples include; ILLIAC-IV, PEPE, BSP, STARAN, MPP, DAP and the Connection Machine (CM-1). The Connection Machine CM-1 has 65,536 simple 1-bit processors connected into a hypercube and each having 4Kbits of memory. Every processor is connected to a central unit called the 'microcontroller' which issues identical 'nanoinstructions' to all of them. This unit can be regarded as a control unit. Processors Grain Topology Control Multiplicity V S Hypercube V

Special features

from http://www.tu-bs.de/institute/WiR/weimar/ZAscript/node41.html It should be noted that the CM-1 is not very efficient when doing floating-point calculations. In the development it turned out that floating-point performance was very important for the commercial success of such a massively parallel computer. Therefore in the CM-2, the memory size was increased (to 64K or 256K per processor) and special floating-point accelerators were added. These chips were added one for each 32 1-bit processors, corresponding to the 32-bit width of one floating-point variable. In further development, the principle of using custom build hardware for the processors was abandoned, because commercial microprocessors were gaining in speed much faster than could be achieved with custom hardware. The next generation [CM-5] of connection machines used standard microprocessors, thus abandoning the SIMD principle. By now (1996) Thinking Machines Corporation has abandoned the hardware development, and now focuses on software development for massively parallel computers constructed by other companies.

http://wotug.ukc.ac.uk/parallel/documents/misc/timeline/timeline.txt ========1981======== Danny Hillis writes first description of the Connection Machine architecture (appears as memo from Artificial Intelligence Lab at MIT). (BMB: TMC, Connection Machine) ========1983======== DARPA starts Strategic Computing Initiative, which helps fund such machines as Thinking Machines Connection Machine, BBN Butterfly, WARP from Carnegie Mellon University and iWarp from Intel Corp. (MW: DARPA) ========1985======== TMC demonstrates first CM-1 Connection Machine to DARPA. (BMB: TMC, CM-1) ========1986======== Thinking Machines Corp. ships first Connection Machine CM-1 (up to 65536 single-bit processors connected in hypercube). (GVW: TMC, CM-1) ========1987======== TMC introduces CM-2 Connection Machine (64k single-bit processors connected in hypercube, plus 2048 Weitek floating point units). (GVW: TMC, CM-2) ========1989======== Gordon Bell Prize for absolute performance awarded to a team from Mobil and Thinking Machines Corporation, who achieved 6 GFLOPS on a CM-2 Connection Machine; prize in price/performance category awarded to Emeagwali, who achieved 400 MFLOPS per million dollars on the same platform. (GVW: Gordon Bell Prize) ========1990======== Gordon Bell Prize in price/performance category awarded to Geist, Stocks, Ginatempo, and Shelton, who achieved 800 MFLOPS per million dollars in a high-temperature superconductivity program on a 128-node Intel iPSC/860; prize in compiler parallelization category awarded to Sabot, Tennies, and Vasilevsky, who achieved 1.5 GFLOPS on a CM-2 Connection Machine with Fortran 90 code derived from Fortran 77. (GVW: Gordon Bell Prize) ========1991======== Thinking Machines Corporation produces CM-200 Connection Machine, an upgraded CM-2. MIMD CM-5 announced. (BMB: TMC, CM-200)

Interesting Web Links

The Connection Machines CM-1 and CM-2

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Updated May 01, 2000