B. NUMERICAL SYSTEM
1.  Internal Number System
   There are two major considerations in the selection of a
number system for a given computing system. Approximately 56
systems utilize the binary number system whereas 26 systems of
the 62 reporting this feature utilize the decimal system as an
internal number system. Of course, practically every system,
in the final analysis, utilizes a binary system of storage. The
primary method of storage is to exploit the bi-stable properties
of material media, such as semiconductors, ferroelectrics and
ferromagnetics. The presence or absence of a sonic pulse packet
in an acoustic delay line is storage in a binary form. The "on"
or "off" state of vacuum tubes is essentially a binary storage
system. A decimal ring counter, utilizing 10 tubes, has but one
tube in the "on" state to designate a decimal digit. The tube
itself only experiences binary information storage. The excep-
tion to this uay be a system in which several conduction or
stressed states may exist, in which case, the storage may be
other than binary. No major system reported utilizes a basic
storage system other than binary. However, the systems process-
ing information decimally usually treat binary digits in tetrads,
or groups of four. The tetrad expresses a decimal digit and
the tetrad is treated as a unit (a decimal digit i.e., binary
coded decimal) throughout storage and computation. It is never
broken or split in an operation such as an extract or shift
and, as a matter of fact, in a decimal system, the operator
or programmer need not be aware of the existence of the tetrad.
2. Word Length
   The variation of word length is extensive. Of 67 computing
systems reporting a fixed word length, the smallest word lengths
were 16 binary digits for the WHIRLWIND-I and 5 decimal digits
for the WEDILOG. The largest word length reported was 20 decimal
digits for the BARBER-COLMAN DECIMAL DIGITAL Computer and the
Monorobot series of computers. Of the 65 remaining systems, 45
have a word length between 16 decimal digits (ADEC and NORC)
and 10 decimal digits (CALDIC, DETATRON, ELECOM, ENIAC, IBM 650
and 608, MODAC, QARAC, PENNSTAC and READIX). The average binary   
word length appears to be approximately 14.Q binary digits and the
average decimal word length appears to be approximately 12 decimal
digits. Table II shows the word lengths of various machines in an
approximate relative order of word size.
5. Digits per Instruction
   Considering the 56 systems reporting the number of digits
utilized for an instruction, approximately 19 machines utilized
the entire word for one instruction, including one or more
addresses as part of the instruction. Approximately 15 systems
bad used 1/2 of a word to indicate an instruction and an address,
whereas about II. systems utilized two words to specify a complete
instruction, including the addresses of the various operands.
4. Number of Digits per Instruction not Decoded
   In approximately 20 different systems, some number of digits
in the instruction were not decoded, in contrast to 18 systems
in which all of the digits were decoded. In the majority of 
systems this feature is inapplicable.
5. Number of Instructions per Word
   Of 51 computing systems reporting this featire, 52 reported
operating on a one instruction per word basis. Approximately 16
utilize a two instruction per word system. This method usually
assigns an instruction to each half of the machine word, retain-
ing a digit or two for checking purposes. The RAYDAC system
operates two words per instruction and the OBDFIAC system may
operate on either a one-instruction-per-word basis or a two-words
per-instruction basis. The MELLON INSTITUTE DIGITAL COMPUTER
operates on a four instruction per word basis.
6. - 7. Total Number of Instructions Decoded and Used
   The total number of instructions, utilized in 61 different
systems, varied considerably from system to system. Approximately
50 systems utilized between 20 and 60 instructions in their 
operational
code. The average number of instructions used in electronic
digital computers is approximately 40. The ORACLE utilizes a
code of 105 instructions. Six systems utilize an instructional
code containing less than 10 instructions.
	In many systems, the number of instructions decoded slightly
exceeded or ws equal to the number of instructions actually in
use. For the cases in which there is an excess, the performance
of new instructions may be simplified through the use of the
decoder in which several unused commands exist. This situation
may be utilized to provide an unused comsand halt for checking
purposes.
                        TABLE II
             COMPUTING SYSTEMS' WORD LENGTH 
| WORD LENGTH DIGITS | COMPUTING SYSTEM | ARITHMETIC POINT | INSTRUCTIONS PER WORD 42 dec | MAGNEFILE-D | fix | - | 20 dec | BAR-COL DEC DIG | fix | - | 20 dec | MONROBOT-III | fix | 1 | 20 dec | MONROBOT-V | fix | - | 20 dec | MONROBOT-VI-MU | fix | 2 | 64 bin | MELLON INST DIG | fix | 4 | 16 dec | ADEC | fix | 1 | 16 dec | NORC | flo and fix | 1 | 50 bin | WISC | flo | 1 | 48 bin | MANIAC-II | flo and fix | 2 | 48 bin | TECHNITROL-180 | fix | 1 | 45 bin | DYSEAC | fix | 1 | 45 bin | FLAC | fix | 1 | 45 bin | MIDAC | fix | 1 | 45 bin | NAREC | fix | 2 | 45 bin | SEAC | fix | 1 | 44 bin | CIRCLE | fix | 2 | 44 bin | EDVAC | fix | 1 | 42 bin | NCB-CRC-102A | fix | 1 | 12 dec | BUR-ElOl | fix | 4 | 12 dec | LARC | flo and fix | - | 12 dec | LOG | fix | - | 12 dec | OLIVETTI-GBM | fix | - | 12 dec | TIM-II | fix | 1 | 12 dec | UNIVAC | fix | 2 | 12 dec | UNIVAC-II | fix | 2 | 40 bin | FERRANTI MARK-I | fix | 2 | 40 bin | FERRANTI MARK-II | flo | 2 | 40 bin | LAS | fix | 2 | 40 bin | ILLIAC | fix | 2 | 40 bin | JOHNNIAC | fix | 2 | 40 bin | MANIAC | fix | 2 | 10 sex | MINIAC | fix | 1 | 40 bin | ORACLE | fix | 2 | 40 bin | ORDVAC | fix | 2 | 39 bin | PEGASUS | fix | 2 | 11 dec | IBM-650 | fix | 2 | 11 dec | RAYCOM | - | - | 11 dec | WHITESAC | fix | 1 | 37 bin | SWAC | fix | 1 | 36 bin | IBM-701 | fix | 2 | 36 bin | IBM-704 | flo | 1 | 36 bin | RAYTAC | fix | 1/2 | 36 bin | UNI-SCI(ERA-l1O3A) | fix | 1 | 34 bin | ALWAC-III | fix | 2 | 10 dec | CALDIC | fix | 1 | 10 dec | DATATRON | flo | 1 | 10 dec | ELECOM-50 | fix | - | 10 dec | ELECOM-120A | flo and fix | 1 | 10 dec | ELECOM-125 | flo and fix | 1 | 10 dec | ELECOM-125FP | - | - | 10 dec | ENIAC | fix | 5 | 10 dec | MODAC-410 | fix | - | 10 dec | OARAC | fix | 1 | 10 dec | PENNSTAC | flo and fix | 1 | 10 dec | READIX | fix | 2 | 32 bin | RCA BIZMAC | fix | - | 9 dec | IBM-608 | fix | - | 9 dec | NCR-CRC-102D | fix | 1 | 9 dec | NCR-303 | fix | 1 | 9 dec | UDEC-I | fix | 2 | 9 dec | UDEC-II | fix | 2 | 30 bin | ELECOM-100 | fix | 1 | 30 bin | LGP-30 | fix | 1 | 29 bin | BENDIX-G15 | fix | 1 | 8 dec | BENDIX-D12 | fix | - | 8 dec | MAGNEFILE-B | fix | - | 8 dec | ORDFIAC | fix | 1/2 | 24 bin | UNI-SCI (ERA-1101) | fix | 1 | 24 bin | UNI-SCI (ERA-1102) | fix | 1 | 6 dec | BAEQS | fix | - | 6 dec | MODAC-404 | fix | - | 20 bin | HAL RAY BROWN | fix | 1 | 17 bin | HUGHES AAC MOD-III | fix | 1 | 5 dec | IBM-CPC | fix | - | 5 dec | IBM-604 | fix | - | 5 dec | IBM-607 | fix | - | 5 dec | MDP-MSI-5014 | - | - | 5 dec | WEDILOG | fix | - | 16 bin | WHIRLWIND-I | fix | 1 | 10 bin | FERRANTTI MARK-II | flo and fix | 2 |  | 
  Systems indicated as floating-point have built-in automatic
floating-point circuitry.
  Fixed-point systems may be programmed for the floating-point
operation through the use of subroutines.
8. Arithmetic System
  Of 70 types of machines in which the kind of arithmetic system
utilized was reported, 61 operated completely on a fixed-point
basis. On six machines, the MANIAC-Il, PENNSTAC, IBM 701, ALWAC III,
ELECTRODATA, and BENDIX G-15, one could program problems either
on a fixed-or floating-point basis, without the need for programmed
conversion. The floating-point operation is built into the system.
The ELECOM 120A and the ELECOM 125 are available as floating-point
systems on an optional basis.
9.	Instruction Type
	In general, it may be stated that approximately one-half of
the different types of electronic digital computing systems 
operate
on a one-address code basis. The distribution of instruction types
is shown in the following Table:
       Instruction Type       Number of
       Address Code           Systems
          One                     33
          Two                      6
          Three                   12
          Four                     6
       One or two                  5
       Modified two                2
       Three or four               1
                             --------
       Total                      65
	The SEAC may be operated on a three or a four-address code
basis. The HUGHES AAC and the BENDIX G-15 operate on a modified
two-address type of instructional code.
10.	Number Range
	The question of number range has been answered in many
different ways in the various types of digital computing systems
reported. Considering the 57 different computing systems on which
a specific number range was given, approximately 56 systems 
utilize
a numerical system in which all numbers lie between the limits of
minus one and plus one. In this system, of course, the point is
always at the extreme left end of the number. The remaining 
machines
utilize various other number range systems. For example, the SEAC
and DYSEAC use a number range of minus four to plus four, the
MONEOBOT VI uses a centrally located point with 10 decimal digits
on each side. In some machines, such as the UDEC I, UDEC II,
PENNSTAC, BIZMAC, OARAC, IBM 705 and IBM 702, the location of the
decimal point is preset at any desirable location at the begin-
ning of a problem. It is usually retained in this position for the
duration of the problem for consistent results.
C.	ARITHMETIC UNITS
1.- 2. - 5. Add, Multiply and Divide Time
	Since one of the primary functions of an arithmetic unit in
any computer is to perform repetitive arithmetic operations as
rapidly as possible, the time required to carry out an add instruc-
tion is extremely important when selecting a given computing system
for a specific application. Table Ill was prepared to show at a glance
the general state of the art with respect to arithmetic speed. It
must be emphasized that the values stated in the tabulation are on
an "as reported basis." Unless otherwise noted, the various times
exclude the time required for access to the storage unit for the
various operands. The multiply time my be considered to be some-
what longer than the product of the number of binary digits per
word and the add time. The divide time in turn, is usually some-
what longer than the multiply time.
  Table IV shows the approximate relative order of add time
when including the storage access time. In many systems, it is
not possible to sensibly determine the time required for one
addition without considering storage access. This may be partially
due to the fact that in serial operation, sums may form in an
accumulator as the addend is brought from storage, hence access
time may be inseparable from add time.
4. Construction
  All of the computing systems described in this report utilize
tubes as the basic driving element in the arithmetic unit with the
exception of recent models such as the IBM 608, 704 and the LA2RC,
which utilize transistors. Approximately 19 of a total of 69
systems in which this feature was reported, utilize diode logic
(gating) in some form in the arithmetic unit. Several systems
such as the FERRANTI MARK-Il, IBM 704, and IBM 705, are or will use
magnetic cores in the arithmetic unit. Several systems utilize
magnetic elements in the sense of transformers and drum registers.
5. Number of Rapid Access Word Registers
  In the process of computation, the control and arithmetic
units of a system usually work in conjunction with several registers
built within them, rather than work directly with the storage unit.
The various operations are carried out with the operands in these
registers, with the exception of transfer instructions to and from
the various storage units. Of the 54 systems in which this feature
is reported, 7 systems operate without rapid access storage registers,
5 systems utilize one rapid access register, 5 systems utilize two
rapid access registers, 14 systems utilize three registers, 7
utilize four registers, and 5 utilize five registers. Approximately
17 systems were reported as utilizing more than five registers,
however 10 of these reported the entire high speed storage unit
as rapid access registers. For this report, the intention was
to include only those registers within the arithmetic unit itself
and not the major storage unit.
                        TABLE III
             COMPUTING SYSTEMS' ADD TIME EXCLUDING ACCESS 
| ADD MICROSECONDS | NAME OF SYSTEM | MULTIPLY MICROSECONDS | DIVIDE MICROSECONDS 3 | NAREC | 520-790 | 660-790 | 4 | LARC | 8 | 28 | 5 | UNI-SCI (ERA-1101) | 260 | 524 | 6 | SWAC | 296 | - | 8 | WHIRLWIND-I | 25.5 | 57 | 11 | ORACLE | 200-440 | 440 | 12 | IBM-704* | 228 | 228 | 15 | NORC | 31 | 227 | 17 | IBM-705 | 1,666/8 dig | variable | 17 | MANIAC-II | 280 | 460 | 17 | UNI-SCI (ERA 1102)* | 264	max	540 max | 23 | IBM-702 | variable		variable | 24 | ILLIAC | 600-750 | 850 | 31 | IAS | 620 | 920 | 36 | IBM-7Ol* | 414 | 444 | 42 | UNI-SCI (ERA 1103A) | 128-410 | 480-492 | 43 | BENDIX-D12 | - | - | 48 | DYSEAC | 2,100 | 2,100 | 48 | FLAC | 2,112 | 2,112 | 48 | MIDAC | 2,208 | 2,208 | 48 | SEAC | 2,112 | 2,112 | 48 | TECH-180 | 3,160 | 5,160 | 50 | ORDVAC			7 | 50 av | 1,000 | 60 | IBM-701* | 444 | 444 | 72 | IBM-704* | 192 | 204 | 80 | MANIAC | 1,000 | 1,000 | 80 | PENNSTAC | 1,000 | 2,000 | 120 | UNIVAC | 1,800 | 3,600 | 120 | UNIVAC-II | 1,800 | 3,600 | 160 | CALDIC | 17,000 | 17,000 | 170 | DATATRON | 1,376-16,856 | 1,850-20,210 | 180 | OARAC | 1,000-7,000 | 12,000 approx | 200 | ENIAC | 2,800 | 24,000 | 200 | HAL RAY BROWN | 1,200 | 12,000 | 200 | HUGHES AAC MOD-III | 1,700 | 1,700 | 220 | IBM-608 | 11,000 av | 13,420 av | 260 | LGP-30 | 17,000 | 17,000 | 275 | BENDIX-G15 | 1,600 | 1,600 | 300 | MINIAC | 13,600 | 14,800 | 300 | ORDFIAC | 2,700 | 6,400 | 315 | PEGASUS | 2,000 av | 5,500 | 330 | ELECOM-120A | 18,300 | 18,700 | 330 | ELECOM-125 | 18,300 | 18,700 | 351 | LOG | 1,685-14,087 | - | 440 | READIX | 25,000 | 40,000 | 500 | ALWAC-III | 17,000 | 17,000 | 500 | CIRCLE | 2,000 | 2,000 | 500 | IBM-604 | 14,000 av | 17,000 av | 520 | IBM-607 | 12,940 av | 15,700 av | 570 | RCA BIZMAC* | 11,740 (2-8 char	words) | . | 600 | MODAC-410 | 7,000 | 7,000 | 640 | UDEC-I | 4,000 | 5,600 | 650 | ELECOM-50 | 39,000 (60 minor	cycles) | . | 680 | UDEC-II | 30,000 | 30,000 | 720 | IBM-650 | 2,210-19,600 | 6,000-23,400 | 760 | IBM-CPC | 15,180 av | 15,480 av | 850 | FLAC | 3,300 | 5,300 | 1,000 | WEDILOG | 1,000 | 1,000 | 1,200 | FER MARK-I | 2,160 | - | 1,500 | TIM-II | 1,500/dec dig | 1,500/dec dig | 1,700 | OLIVETTI-GBM | - | - | 1,800 | MODAC-404 | - | - | 4,000 | NCR-CRC-102A | 15,000 | 15,500 | 4,000 | NCR-CRC-102D | 15,000 | 15,500 | 6,000 | BAR-COL DEC DIG | 200,000 av | 200,000 av | 7,800 | NCR-303 | 20,700-48,800 | 25,400-54,600 | 11,800 | ELECOM-l00 | 11,800 | 1,000,000 | 15,000 | WHITESAC | 40,000 | 40,000 | 100,000 | MAGNEFILE-D | - | - | 150,000 | MAGNEFILE-B | - | - |  | 
 	*IBM-70l           36 microsec    M.G. storage
 	LBM-701            60 microsec    C.R.T. storage
 	IBM-704            12 microsec    Fixed-point
 	TBM-704            72 microsec    Floating-point
 	RCA BIZMAC                        8 char word
 	UNI-SCI (ERA 1102)		  maximum values
                        TABLE IV
             COMPUTING SYSTEMS' ADD TIME INCLUDING ACCESS 
| ADD MICROSECONDS | NAME OF SYSTEM | MULTIPLY MICROSECONDS | DIVIDE MICROSECONDS 60 | FEE MARK-II | 300(40 bit flo-pt) | - | 64 | SWAC | 368 | - | 192-1536 | EDVAC | 2,208-5,552 | 2,256-3,600 | 192-1540 | SEAC | 2,300-5,600 | 2,500-5,600 | 4,400 | ADEC | 15,200 | - | 16,700 | MISC | 16,700 | 16,700 | 50,000 | BUR-ElOl | 250,000 | 250,000 | 50,000 | MELLON INST-DIG | 50,000 | 100,000 | 120,000 | MONROBOT-IlI | 540,000 | 540,000 | 135,000 | MONROBOT-VI-MtJ | 600,000 | 600,000 |  | 
                        MISCELLANEOUS
| ADD MICROSECONDS | NAME OF SYSTEM | MULTIPLY MICROSECONDS | DIVIDE MICROSECONDS 15 approx. To run 
 concurrent with
 a store cycle | JOHNNIAC | 500 | 1,000 | 56 CRT. Includes 
access to instruction | IBM-701 | 444 | 444 | 58 Includes	
checking | RAYDAC | 240 | 575 | 60 MJ Includes	
access to
instruction | IBM-701 | 444 | 444 | 120 Includes	
 checking | UNIVAC-Il | 1,800 | 5,600 | 160 Two normal	
 word-times | CALDIC | 17,000 | 17,000 (180 normal word-times) |  | 
6. Basic Pulse Repetition Rate One may consider that there are three regions of the frequency spectrum in which the synchronous computing systems operate. These may be termed the low frequency band, less than 100 kilocycles per second, the intermediate frequency band from 100 kilocycles to less than one megacycle, and the high frequency band or the one megacycle and above band. Approximately 16 systems operate at less than 100 kilocycles per second. Approximately 30 systems operate in the 100 kilocycle and less than one megacycle range. Fourteen systems are in the high frequency band at one megacycle and four systems, the UNIVAC, UNIVAC II, RAYDAC and LARC operate at pulse repetition rates higher than one megacycle per second. 7. Arithmetic Mode The question of serial versus parallel operation of arithmetic units is rapidly being resolved as the number of faster parallel operating units increases. Of a total of 67 systems in which this feature was reported, 39 operated purely on a serial basis and 22 performed arithmetic operations on a parallel basis. However, the majority of the parallel operating systems were of a later design. Arithmetically, the parallel system computes results much more rapid.ly than the serial system. Six systems operate in a serio- parallel manner, usually parallel when considering a single char- acter made up of a binary configuration of pulses, but serially when con.sid.ering a word as being made up of a series of characters. The speed of a computer, however, is based on its ability to read, write, and transfer information rapid.ly as well as its ability to do arithmetic rapidly.Go to Next