Return to "Visible Storage"
*** Please note: This website (comp-hist) was completed before I found out about Wikipedia in 2002.
Since then I have added material occasionally.
Items are certainly not complete, and may be inaccurate.
Your information, comments, corrections, etc. are eagerly requested.
Send e-mail to Ed Thelen. Please include the URL under discussion. Thank you ***
PDP-12
Manufacturer DEC - Digital Equipment Corporation Identification,ID PDP-12 Date of first manufacture 1969 Number produced - Estimated price or cost - location in museum - donor - Contents of this page:
- Photo
- Placard
- Architecture
- Special Features
- Historical Notes
- This Specimen
- Interesting Web Sites
- Other information
Photo Photo
DEC PDP-12
-
Kieth says
- The processor's instruction sets are PDP-8 and LINC. LINC stood for "Laboratory Instrumentation Computer." That's why your 12, like most of them, has nifty things like analog inputs and a point-addressable scope.
- The PDP-8 native mathematics is two's complement, however, the machine actually does have some limited and cumbersome support for one's complement. This was primarily for some form of data interchange capability with the PDP-4/7/9/15, which were primarily one's complement.
- Neither the LINC or the PDP-8 actually HAS a concept of endianness. Neither processor is big-endian, neither processor is little-endian. Neither processor directly supports any data size bigger than its wordlength, or smaller than its wordlength. If a routine uses a 24-bit number, it's up to the programmer to decide whether MSW ordering or LSW ordering gets used. This one is primarily a source of confusion because on a DEC LINC machine, the individual bits were numbered with 0 as the most significant bit, but on most other LINC machines, 0 was the least significant bit. They're still LSB rightmost, MSB leftmost on the displays and switches, only the numbers assigned to them differ. Since the PDP-8 doesn't actually include an instruction to, say, test bit 6, the "endianness" difference was irrelevant.
- The instruction formats do differ significantly. Not surprising-- they were completely different sets. :)
- With regards to the direction of writing on tape, this was actually not something the PDP-12 can "choose" without modifying the hardware significantly. A PDP-12 is always designed to read LINCtape. Later versions of the PDP-8 OSes understood this and "fudged" it in software to allow DECtape compatibility (the only real difference was writing direction), but the PDP-12 can never read DECtape without the software understanding the 12. The modification is one that should only be performed on a 12 that will never run in LINC mode, by the way. The two modifications I've seen were, always DECtape-mode, and mode selected by CPU mode. The latter confuses the hell out of mixed-mode software which jumps back and forth between 8 and LINC modes.
- Indexing: The PDP-8 and the LINC both have certain memory locations which autoincrement or autodecrement on access. The 8 and LINC go opposite directions here. This was, actually, a popular trick for mixed-mode 12 software.
Mike Powell says
- not direct quote - processor handles two instruction sets which have different
- PFP-8
- something from Lincoln Labs
arithmetic, one's complement vs. two's complement endin ? big vs. little instruction formats indexing normal direction of writing on tape
and everything else except word lengthKieth says
- The PDP-12 can use either NEGIBUS or OMNIBUS peripherals. (Not 100% sure, actually, if it was NEGIBUS or POSIBUS, but OMNIBUS was allowed with an attachment cabinet.)
- The PDP-12 has audio capabilities.
- The PDP-12 almost always had A/D converters.
- Despite two instruction modes, the instruction engine of the processor was composed of under 700 logic gates.
- The PDP-12 is identical to an 8/I with the LINC processor added, with the exception of B through D, and F. And, if I remember my 8/I specs correctly, the 8/I only allowed one bus. :)
- The PDP-12, like most of the 8 family, retains not only its memory contents, but all CPU registers, when powered off.
Historical Notes
See DEC 12 Bit Time Line
This Specimen
-
-
If you have comments or suggestions, Send e-mail to Ed Thelen
Go to Antique Computer home page
Go to Visual Storage page
Go to top
Updated February 8, 2004